学位/职称

博士/长鑫存储公司资深工程师

办公室电话

166 0565 9668

Email

Yaner.hu@cxmt.com

教育背景

台湾交通大学 资讯工程所 博士 2016

研究方向

1. Hardware and software system integration, FPGA implantation, and test circuit development

2. Algorithm Development

任职经历

2015/09 – 2017/07  联合创始人&技术专案经理(Co-Founder & Project Manager), 伊思艾普科技股份有限公司(isIP Technology Cooperation) (Startup Company)

2014/09 – 2015/09                     助理研究员(Assistant researcher), 资讯工业策进会(Institute for information industry), III

2013/08 –2014/08                      联合创始人&解决方案经理Co-Founder & Solution Architect, 慧流系统整合股份有限公司(Amoesolu Corporation)

2011/08 – 2012/08 助理研究员(Assistant researcher), 工业技术研究院(Industrial Technology Research Institute), ITRI

2011/07 – 2012/07 专案研究员(Project Research Fellow), 国立交通大学isIP实验室(isiP Lab, Computer Science), NCTU

2004/09 – 2011/07 专任系统管理员&讲师(System Manager Officer & Lecturer), 国立交通大学资讯工程系(Computer Science), NCTU

主持、参与项目

个人获奖

l  代表性论著

l  2019 Eye pattern generation device and memory chip test system

l  2018 Testing machine Patent

l  2018 TSV detect circuit and integrated circuit   

l  2018 TSV detect circuit and integrated circuit   

l  2018 Semiconductor device

l  2018 Signal transmission circuit and integrated circuit   

l  2018 Silicon through-hole detection circuitry and integrated circuit chip

l  2018 Circuit and method for detect silicon through hole, integrated circuit chip 

l  2015 Adaptive computing wireless processor

l  Nitride-mediated epitaxy of self-assembled NiSi2 nanowires on (001)Si  

l  2006    Self-assembled endotaxial α-FeSi2 nanowires with length tunability mediated by a thin nitride layer on (001)Si